Performance Optimization of Germanium-Graphene Heterojunction Tunnel Field Effect Transistor using Dual Metal Strip

Authors

  • Sushroot Department of Electronics & Communication Engineering, Integral University, Lucknow, Uttar Pradesh, India Author
  • Syed Hasan Saeed Department of Electronics & Communication Engineering, Integral University, Lucknow, Uttar Pradesh, India Author
  • Vedvrat Department of Electronics & Communication Engineering, Pranveer Singh Institute of Technology, Kanpur, Uttar Pradesh, India Author https://orcid.org/0009-0002-9023-1699
  • Shrish Bajpai Department of Electronics & Communication Engineering, Integral University, Lucknow, Uttar Pradesh, India Author

DOI:

https://doi.org/10.54392/irjmt25311

Keywords:

Graphene, Hetero Structure, Dual Metal Strip, Hetero Dielectric, Current Ratio

Abstract

This work presents and investigates a Dual Metal Gate Graphene Nanoribbon (DMHGNR) with a Germanium heterojunction-based Tunnel Field-Effect Transistor (DMHGNRTFET). The impact of a dual metal strip combined with a hetero-dielectric on the heterojunction TFET architecture is analyzed. Optimization of the ON/OFF current and their ratio is achieved by the use of design engineering, bandgap engineering, and work function engineering. Simulations are carried out to evaluate the proposed DMHGNRTFET together with GNRGeTFET and GNRSiTFET by examining surface potential, energy band diagrams, carrier concentration, electric field distribution, Id-Vgs characteristics, and transconductance. The DMHGNRTFET exhibits an Ion/Ioff ratio of approximately ̴10¹², alongside a minimal subthreshold swing (SS) of 33.9 mV/decade. It features the lowest threshold voltage observed at 0.41 V and achieves a maximum Ion of 2.44 × 10⁻4 A/μm. The findings of SILVACO TCAD simulations suggest the potential for enhanced performance in low power applications of the DMHGNRTFET.

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Published

2025-05-04

How to Cite

1.
Sushroot, Saeed SH, Vedvrat, Bajpai S. Performance Optimization of Germanium-Graphene Heterojunction Tunnel Field Effect Transistor using Dual Metal Strip. Int. Res. J. multidiscip. Technovation [Internet]. 2025 May 4 [cited 2025 Sep. 11];7(3):124-33. Available from: https://asianrepo.org/index.php/irjmt/article/view/147